stateful.h

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/* Copyright 2013-present Barefoot Networks, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *   http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
 
/*
 * Antonin Bas (antonin@barefootnetworks.com)
 *
 */
 
 
#ifndef BM_BM_SIM_STATEFUL_H_
#define BM_BM_SIM_STATEFUL_H_
 
#include <functional>
#include <mutex>
#include <string>
#include <unordered_set>
#include <unordered_map>
#include <vector>
 
#include <boost/thread/locks.hpp>  // for boost::lock
 
#include "bignum.h"
#include "data.h"
#include "named_p4object.h"
#include "short_alloc.h"
 
namespace bm {
 
class RegisterArray;  // forward declaration
 
class Register : public Data {
 public:
  enum RegisterErrorCode {
    SUCCESS = 0,
    INVALID_REGISTER_NAME,
    INVALID_INDEX,
    ERROR
  };
 
 public:
  Register(int nbits, const RegisterArray *register_array);
 
  void export_bytes() override;
 
 private:
  Bignum mask{1};
  // keep a pointer to parent RegisterArray so that export_bytes() can notify
  // write operations
  const RegisterArray *register_array;
};
 
using register_array_id_t = p4object_id_t;
 
class RegisterArray : public NamedP4Object {
  friend class RegisterSync;
  friend class Register;
 
 public:
  using iterator = std::vector<Register>::iterator;
  using const_iterator = std::vector<Register>::const_iterator;
 
  using UniqueLock = std::unique_lock<std::mutex>;
 
  using Notifier = std::function<void(size_t idx)>;
 
  RegisterArray(const std::string &name, p4object_id_t id,
                size_t size, int bitwidth);
 
  Register &operator[](size_t idx) {
    assert(idx < size());
    return registers[idx];
  }
 
  const Register &operator[](size_t idx) const {
    assert(idx < size());
    return registers[idx];
  }
 
  Register &at(size_t idx) {
    return registers.at(idx);
  }
 
  const Register &at(size_t idx) const {
    return registers.at(idx);
  }
 
  // iterators
 
  iterator begin() { return registers.begin(); }
 
  const_iterator begin() const { return registers.begin(); }
 
  iterator end() { return registers.end(); }
 
  const_iterator end() const { return registers.end(); }
 
  size_t size() const { return registers.size(); }
 
  void reset_state();
 
  void register_notifier(Notifier notifier);
 
  UniqueLock unique_lock() const { return UniqueLock(m_mutex); }
  // NOLINTNEXTLINE(runtime/references)
  void unlock(UniqueLock &lock) const { lock.unlock(); }
 
 private:
  void notify(const Register &reg) const;
 
  std::vector<Register> registers{};
  mutable std::mutex m_mutex{};
  int bitwidth{};
  std::vector<Notifier> notifiers{};
};
 
 
// This class was added to provide some measure of concurrency support for
// register accesses. Every time an action is executed, this action is given
// exclusive access to all the registers it is referring to. Same thing for a
// parse state.
class RegisterSync {
 public:
  using Lock = RegisterArray::UniqueLock;
 
  template <size_t NumLocks = 4>
  using LockVector = std::vector<
    Lock, ::detail::short_alloc<Lock, NumLocks * sizeof(Lock), alignof(Lock)> >;
 
  struct RegisterLocks {
    LockVector<>::allocator_type::arena_type a;
    LockVector<> v{a};
  };
 
  void add_register_array(const RegisterArray *register_array);
 
  void merge_from(const RegisterSync &other);
 
  // tried NRVO, but RegisterLocks not movable
  void lock(RegisterLocks *RL) const {
    for (auto m : mutexes) RL->v.emplace_back(*m, std::defer_lock);
    boost::lock(RL->v.begin(), RL->v.end());
  }
 
 private:
  mutable std::vector<std::mutex *> mutexes{};
  std::unordered_set<const RegisterArray *> register_arrays{};
};
 
}  // namespace bm
 
#endif  // BM_BM_SIM_STATEFUL_H_